august 2010 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 www.fairchildsemi.com 1 FDMS8023S n-channel powertrench ? syncfet tm FDMS8023S n-channel powertrench ? syncfet tm 30 v, 49 a, 2.4 m features ? max r ds(on) = 2.4 m at v gs = 10 v, i d = 26 a ? max r ds(on) = 3.0 m at v gs = 4.5 v, i d = 23 a ? advanced package and silicon combination for low r ds(on) and high efficiency ? syncfet schottky body diode ? msl1 robust package design ? 100% uil tested ? rohs compliant general description the FDMS8023S has been designed to minimize losses in power conversion application. advancements in both silicon and package technologies have been combined to offer the lowest r ds(on) while maintaining excellent switching performance.this device has the added benefit of an efficient monolithic schottky body diode. applications ? synchronous rectifier for dc/dc converters ? notebook vcore/gpu low side switch ? networking point of load low side switch ? telecom secondary side rectification 4 3 2 1 5 6 7 8 power 56 d d d d s s s g d d d d g s s s pin 1 bottom top mosfet maximum ratings t c = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage (note 4) 20 v i d drain current -continuous (package limited) t c = 25c 49 a -continuous (silicon limited) t c = 25c 128 -continuous t a = 25c (note 1a) 26 -pulsed 100 e as single pulse avalanche energy (note 3) 86 mj p d power dissipation t c = 25c 59 w power dissipation t a = 25c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 2.1 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS8023S FDMS8023S power 56 13 ?? 12 mm 3000 units
www.fairchildsemi.com 2 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm electrical characteristics t j = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 1 ma, v gs = 0 v30 v bv dss t j breakdown voltage temperature coefficient i d = 10 ma, referenced to 25c 16 mv/c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v500 a i gss gate to source leakage current, forward v gs = 20 v, v ds = 0 v 100na v gs(th) gate to source threshold voltage v gs = v ds , i d = 1 ma 1.2 1.7 3.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 10 ma, referenced to 25c -5 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 26 a 2.02.4 m v gs = 4.5 v, i d = 23 a2.63.0 v gs = 10 v, i d = 26 a, t j = 125c 2.7 3.3 g fs forward transconductance v ds = 5 v, i d = 26 a 168 s c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1mhz 2670 3550 pf c oss output capacitance 975 1300 pf c rss reverse transfer capacitance 95 140 pf r g gate resistance 0.7 2.5 t d(on) turn-on delay time v dd = 15 v, i d = 26 a, v gs = 10 v, r gen = 6 12 21 ns t r rise time 510ns t d(off) turn-off delay time 32 52 ns t f fall time 410ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v, i d = 26 a 41 57 nc q g total gate charge v gs = 0 v to 4.5 v2028nc q gs gate to source charge 7.0 nc q gd gate to drain ?miller? charge 5.4 nc v sd source-drain diode forward voltage v gs = 0 v, i s = 2 a (note 2) 0.63 0.8 v v gs = 0 v, i s = 26 a (note 2) 0.8 1.2 t rr reverse recovery time i f = 26 a, di/dt = 300 a/ s 29 46 ns q rr reverse recovery charge 32 51 nc notes : 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. e as of 86 mj is based on starting t j = 25 c, l = 0.3 mh, i as = 24 a, v dd = 27 v, v gs = 10 v. 4. as an n-ch device, the negative vgs rating is for low duty cycle pulse occurrence only. no continuous rating is implied. a. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 125 c/w when mounted on a minimum pad of 2 oz copper.
www.fairchildsemi.com 3 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm typical characteristics t j = 25c unless otherwise noted figure 1. 0.00.51.01.52.0 0 20 40 60 80 100 v gs = 4.5 v v gs = 4 v v gs = 3.5 v v gs = 6 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 20 40 60 80 100 0 1 2 3 4 5 v gs = 6 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 26 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 3 6 9 12 t j = 125 o c i d = 26 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 20 40 60 80 100 t j = 125 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm figure 7. 0 9 18 27 36 45 0 2 4 6 8 10 i d = 26 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 50 100 1000 5000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.001 0.01 0.1 1 10 100 300 1 10 50 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 20 40 60 80 100 120 140 v gs = 4.5 v limited by package r t jc = 2.1 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e op erating area 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 200 1 s 100 p s 10 ms dc 10 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c figure 12. 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.5 1 10 100 1000 2000 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 5 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm figure 13. 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.0001 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w ( note 1b ) duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 6 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm syncfet schottky body diode characteristics fairchild?s syncfet process embed s a schottky diode in parallel with powertrench mosfet. this diode exhibits similar characteristics to a discrete ex ternal schottky diode in parallel with a mosfet. figure 14 shows the reverse recovery characteristic of the FDMS8023S. schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. this will increase the power in the device. figure 15. syncfet body diode reverse leakage versus drain-source voltage 0 5 10 15 20 25 30 0.000001 0.00001 0.0001 0.001 0.01 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (a) v ds , reverse voltage (v) typical char acteristics (continued) figure 14. FDMS8023S syncfet body diode reverse recovery characteristic 0 50 100 150 200 250 -5 0 5 10 15 20 25 30 di/dt = 300 a/ s current (a) time (ns)
www.fairchildsemi.com 7 ?2010 fairchild semiconductor corporation FDMS8023S rev.c1 FDMS8023S n-channel powertrench ? syncfet tm dimensional outlin e and pad layout
FDMS8023S n-channel powertrench ? syncfet tm ?2010 fairchild semiconductor corporation 8 www.fairchildsemi.com FDMS8023S rev.c1 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform wh en properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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